silicon gate
英 [ˈsɪlɪkən ɡeɪt]
美 [ˈsɪlɪkən ɡeɪt]
网络 硅栅; 硅栅极; 矽闸
双语例句
- Silicon insulated gate fet Cable Pipe-a protection casing pipe used for special purposes when crossing roads or bridges, with good characteristics of being acidproof and alkaliproof, and good performance on electric insulation and electromagnetic shielding.
硅绝缘栅场效应晶体管电缆管&为电缆过路、过桥专用保护套管，具有良好的耐酸碱和电气绝缘性能，电磁屏蔽性能。 - Silicon gate complementary MOS
硅栅互补金属氧化物半导体 - Silicon gate self aligned junction isolated cmos
硅栅自对准结隔离互补金属氧化物半导体 - The reliability of strain silicon, gate dielectric and copper interconnection are discussed, and some new researches are presented.
简介了应变硅材料、栅介质的工艺及铜互连的可靠性，并对新的研究方向做了介绍。 - Silicon trench and polysilicon gate etch for RMOs devices
RMOS器件中硅槽及多晶硅栅的刻蚀 - The digital trigger to silicon controlled rectifier based on field programmable gate array ( FPGA) has high accuracy and the ability of phase self-adjusting.
以现场可编程门阵列（FPGA）作为触发脉冲生成器，精确性高，并具有相序自适应性。 - The thick film SOI MOSFET can be fully depleted under normal operating condition, if there is an anti doped silicon island near the back gate in the channel.
通过在厚膜SOIMOSFET靠近背栅的界面形成一个相反掺杂的硅岛，从而使得厚膜SOIMOSFET变成全耗尽器件。 - Applying silicon gate technology, the chip has a lower value in power consumption than the products made by aluminum gate technology.
由于采用硅栅工艺，该芯片比市场上曾经流行过的铝栅产品功耗更低。 - Effect of Silicon Film Thickness on Performance of SOI Gate Controlled Hybrid Transistor
硅膜厚度对SOI栅控混合管性能的影响 - Dual-gate FET Mixers at X-band The Development of the N-channel Silicon Gate MOS Devices
X波段双栅场效应晶体管混频器硅栅N沟道MOS场效应晶体管的研制 - On the other hand, it is essential to prepare high quality silicon nitride thin film for gate insulator layer of TFT in order to get excellent TFT.
与此同时，制备高质量的栅绝缘层用氮化硅薄膜也是制备高性能薄膜晶体管（TFT）这一课题的需要。 - Effect of Capping Silicon Nitride Layer and Nitrided Gate Oxide on Hump of Transistors
覆盖Si3N4层和栅氧化物氮化对晶体管的影响 - The chip layout redesigns adopt 3 μ m P-well silicon gate single metal CMOS layout design rules. Logic combination circuit layout adopts standard cell design which reduces chip area on the whole.
芯片版图的再设计采用了3μm的P阱硅栅单层金属CMOS版图设计规则，对逻辑组合电路部分的版图采用了标准单元的设计，从整体上缩小了芯片的面积。 - Silicon gate P-MOS technique has been adopted in developing the device, and a kind of three FETS dynamic circuit with varactor bootstrap has been adopted in developing the shift register used as scanned circuit.
该器件采用了硅栅P-MOS工艺，而作为扫描电路的移位寄存器是采用的一种带变容管自举电路的三管动态无比电路。 - This paper describes a technique of nigh speed CMOS logic circuits with 3-μ m silicon gate.
本文所介绍的我们研制成功的3微米硅栅高速CMOS逻辑电路工艺；是在八十年代初国外刚开发成功推出的产品。 - A special programable fifth order elliptic switched capacitor low pass filter has been investigated, which used SCF new theory and computer aid design, realized by silicon gate CMOS process.
本文主要介绍可编程开关电容滤波器的研制，通过计算机辅助设计，采用五阶椭圆结构，用硅栅CMOS工艺实现，研制了一种专用可编程低通滤波器。 - Expressions of threshold voltage of short channel silicon gate MOS-FET and the temperature dependence of threshold voltage were derived from Yaus model.
本文从yau的模型出发，推导出了短沟道硅栅MOSFET的阈电压表达式及阈电压与温度的关系：并考虑短沟道MOSFET的扩散电流。 - Study of Radiation Effect of the Silicon Gate Si/ SiO_2 System Implanted BF_2~+ at Low Dose Rate
BF2～+注入硅栅Si/SiO2系统低剂量率辐照效应的研究 - Analysis and Simulation of fluorine migration characteristics of BF+ 2 implanted into polycrystalline silicon gate
BF2~+注入多晶硅栅F迁移特性的分析与模拟 - Silicon Compilation of Gate Array Bases
门阵母片的硅编译 - Influence of Silicon Film Thickness and Back Gate upon Characteristics of Fully Depleted Thin Film SIMOX/ SOI MOSFET's
硅膜厚度和背栅对SIMOX／SOI薄膜全耗尽MOSFET特性影响的研究 - The Development of the N-channel Silicon Gate MOS Devices Channelling investigation of As implanted Si crystals
硅栅N沟道MOS场效应晶体管的研制砷注入硅背散射沟道研究 - Radiation-Induced Interface State of Silicon Gate MOS Structure
硅棚MOS结构的辐射感生界面态 - Investigation of Silicon Gate CMOS Gate Array LSI
硅栅CMOS门阵列LSI的研制 - For this model, is considered in sub. The film double-gate MOSFET with ordinary bulk silicon MOSFET, more than one under the gate, more control over the silicon film.
对于此模型的建立，是分段考虑的。薄膜双栅MOSFET与普通体硅MOSFET相比，多了一个下栅极，对硅膜的控制力更强。 - Just let nitrogen doped into the gate oxide, but far from the gate oxide silicon interface, can let the nitrogen gate oxide-to charged center and silicon interface lattice interface roughness produces little influence.
只要让氮掺杂入栅氧化层，但是都远离栅氧化层-硅界面，就能让氮对栅氧化层-硅界面的带电中心和晶格界面粗糙度产生很少的影响。